Senior Hardware IC Packaging Engineer
Company: VirtualVocations
Location: Vista
Posted on: May 20, 2025
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Job Description:
A company is looking for a Senior Hardware IC Packaging Design
Engineer.
Key Responsibilities
Drive early chip-package co-design and development of bump and ball
map
Own layout of package types such as FCCSP, FCBGA, FCQFN, WLCSP,
QFN
Collaborate with multiple cross-functional teams (Chip Design,
SI/PI, Packaging)
Required Qualifications
Proficiency with Cadence Allegro Package Designer (APD) and
AutoCAD
Minimum 4+ years of experience in packaging design and layout,
preferably in an advanced silicon node
Proven track record with multiple packaging types where products
have gone to volume production
Experience routing high-speed, high pin count devices and
understanding of signal and power integrity fundamentals
Knowledge of organic laminate substrate technologies and
manufacturing capabilities
Keywords: VirtualVocations, Santa Ana , Senior Hardware IC Packaging Engineer, Engineering , Vista, California
Click
here to apply!
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